pub struct W(/* private fields */);Expand description
Register UCSR1B writer
Implementations§
source§impl W
impl W
sourcepub fn txb81(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 0>
pub fn txb81(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 0>
Bit 0 - Transmit Data Bit 8
sourcepub fn ucsz12(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 2>
pub fn ucsz12(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 2>
Bit 2 - Character Size
sourcepub fn txen1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 3>
pub fn txen1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 3>
Bit 3 - Transmitter Enable
sourcepub fn rxen1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 4>
pub fn rxen1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 4>
Bit 4 - Receiver Enable
sourcepub fn udrie1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 5>
pub fn udrie1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 5>
Bit 5 - USART Data register Empty Interrupt Enable
sourcepub fn txcie1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 6>
pub fn txcie1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 6>
Bit 6 - TX Complete Interrupt Enable
sourcepub fn rxcie1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 7>
pub fn rxcie1(&mut self) -> BitWriterRaw<'_, u8, UCSR1B_SPEC, bool, BitM, 7>
Bit 7 - RX Complete Interrupt Enable